CIA 6526 (Complex Interface Adapter) reference

CIA register set:
    7 6 5 4 3 2 1 0
$00 (R/W)PRA PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
$01 (R/W)PRB PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
$02 (R/W)DDRA DPA7 DPA6 DPA5 DPA4 DPA3 DPA2 DPA1 DPA0
$03 (R/W)DDRB DPB7 DPB6 DPB5 DPB4 DPB3 DPB2 DPB1 DPB0
$04 (R)TAL Timer A Low-Byte
$05 (R)TAH Timer A High-Byte
$06 (R)TBL Timer B Low-Byte
$07 (R)TBH Timer B High-Byte
$04 (W)TAL Timer A Prescaler Low-Byte
$05 (W)TAH Timer A Prescaler High-Byte
$06 (W)TBL Timer B Prescaler Low-Byte
$07 (W)TBH Timer B Prescaler High-Byte
$08 (R/W)10THS unused ¹ TOD 1/10th Seconds
$09 (R/W)SEC unused ¹ TOD Seconds
$0A (R/W)MIN unused ¹ TOD Minutes
$0B (R/W)HR PM unused ¹ TOD Hours
$0C (R/W)SDR Serial Data Register
$0D (R)ICR IR unused ¹ FLAG SP ALARM TB TA
$0D (W)ICR S/C unused FLAG SP ALARM TB TA
$0E (R/W)CRA TOD IN SP MODE IN MODE LOAD RUN MODE OUT MODE PB6 ON START
$0F (R/W)CRB ALARM IN MODE LOAD RUN MODE OUT MODE PB7 ON START

¹ - Unused bits read back 0


Start:
0 Stop timer
1 Start timer


PB On:
0 Normal operation
1 Timer output appears on PBx


Out Mode:
0 Pulse
1 Toggle


Run Mode:
0 Timer is run in continuous mode
1 Timer is run in one-shot mode


Load:
0 No effect
1 Force load prescaler into timer


In Modes:
%00 Timer counts clock pulses
%01 Timer counts positive CNT transitions
%10 Timer B counts Timer A underflow pulses
%11 Timer B counts Timer A underflow pulses while CNT is high


SP Modes:
0 Serial Port output (CNT sources shift clock)
1 Serial Port input (external shift clock)


TOD In:
0 60 Hz clock for TOD
1 50 Hz clock for TOD


Alarm:
0 Writing to TOD registers sets clock
1 Writing to TOD registers sets alarm


Notes to the DDR (Data Direction Registers):

If a bit is 0, the corresponding port bit is set to input mode. If it is 1, the port bit is set to output mode.


Notes to the ICR (Interrupt Control Register):

Reading the ICR will read the interrupt flags and automatically clear them.
Writing the ICR allows you to modify the interrupt mask. If any of bits 0 to 4 is cleared, the corresponding mask bit will be left untouched. If a bit is set, the corresponding mask bit will be either set or cleared depending on the state of bit 7.




Application of the two CIAs in the Commodore 64/128:


CIA 1 register set:
    7 6 5 4 3 2 1 0
$DC00 (W)KCOL Keyboard matrix column select
$DC00 (R)JOY2   /Fire /Right /Left /Down /Up
$DC00 (R/W)Paddle /Pad1 /Pad2   /Fire1 /Fire2  
$DC01 (R)KROW Keyboard matrix row read
$DC01 (R)JOY1   /Fire /Right /Left /Down /Up
$DC02 (R/W)DDRA $FF (output)
$DC03 (R/W)DDRB $00 (input)


CIA 2 register set:
    7 6 5 4 3 2 1 0
$DD00 (R/W)I/O Data In Clk In /Data Out /Clk Out /Atn Out /TXD Out /VIC Bank
$DD01 (R/W)Userport Userport data in/out
$DD02 (R/W)DDRA 0 0 1 1 1 1 1 1
$DD03 (R/W)DDRB Depending on userport application


© 2012 Graham

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